Double negative statements, I misread it at "doesn't mean they're improving" at first
Only the "Tick" in the "Tick-tick model" refers to process/node shrink. Process shrinks always have efficiency improvements and we're talking about very large efficiency improves every full-node advancement.
Efficiency here has double meaning (actually its a cause-and-effect): Given a near-identical micro-architecture at the same level of performance, it would:
- be able to deliver the using half the silicon (literally half),
- lower power consumption (as a result of using less silicon).
Chip-makers like Intel, AMD, nvidia, ARM, and Qualcomm, usually don't just shrink and do nothing, they'd almost always sacrifice some extra power consumption headroom to get higher performance, either by:
- Increasing the clock speed (aka CPU freqeuncy),
- stuffing in more transistors in the chips (more relevant to GPUs)
The "Tock" in the "Tick-tock model" refers to "Architectural Improvements". Given the same process node, we get better efficiency and performance. Intel's 5th gen Broadwell and 6th gen Skylake is a great example of a "Tock" (although I think the first tock, 1st gen Nehalem vs 2nd Gen Sandy Bridge, was more drastric).
Kaby Lake was the first new micro-architecture for the Core CPUs to not follow the "Tick-Tock Model", but introducing the newer "Process, Architecture, Optimization". This is no good news for tech enthusiasts. It was always the process that brings greater overall improvements. So undoubtedly x86 CPUs will slow down on improving performance.
Let's talks about process/node/die shrinks
Intel was always the leader of fabrication processes (i.e. the process shrinks), and by far (like a one to two year lead) - quite "state-of-the-art". This is also one of the reasons why AMD never kept up. Intel of course didn't want to give up this competitive advantage, but process shrinks cannot go indefinitely, and the smaller the node, the more difficult it is to shrink. 10nm (Cannonlake) seems to be the first apparent slowdown. This is a physical limitation. This also implies that all silicon-based chips would suffer highly similar patterns, so by the time ARM-based chips hits a certain node, they'd slow down as well.
Oh by the way, of all the major chip makers, only Intel has their own fabrication plants. All other chip designer actually outsource to their fabrication partners, like Samsung, TSMC and GlobalFoundry. Qualcomm gets their ARM processors fabbed by Samsung (mostly), and their latest addition, the Snapdragon 835 is being made on the 10nm process, which sounds the same as Cannonlake, but since Samsung and Intel does it differently, they cannot be directly compared. For example, it was said that Samsung's 14nm didn't really match Intel's 14nm in efficiency, but some sources says otherwise. It's hard to compare because Intel would never use Samsung's fab and would never let other's use their fab, so architecture matters. Anyways, this does not matter as they near the physical limitation (which people are still unclear when the limitation would be hit).
TL;DR + conclusion:
This means that although Intel's process is slowing down, it is likely that other chipmaker's process would slow down as well. So as long as everyone is using silicon to make their semiconductor chips, they'd face the same physical limitations.